Anti-Tamper Digital Clocks - An Overview
Anti-Tamper Digital Clocks - An Overview
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seventeen. The equipment for detecting clock tampering as defined in assert 15, whereby the Examine circuit is activated by a clock edge at an conclude in the clock Examine period of time.
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Yet another aspect of the invention may possibly reside in an equipment for detecting clock tampering, comprising a circuit that gives a monotone signal, a plurality of resettable delay line segments, and an Examine circuit. The circuit offers the monotone sign for the duration of a clock evaluate period of time associated with a clock. The plurality of resettable hold off line segments hold off the monotone sign to deliver a respective plurality of delayed monotone signals.
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A no-clock-current affliction may very well be detected once the circuit Using the longest propagation hold off is brought on. This set off may well possibly be utilized by asynchronous circuits to respond promptly or maybe a point out little bit could be established for your process to react later if the clock will come back on.
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An exemplary storage medium is coupled into the processor these kinds of the processor can examine information and facts from, and publish information to, the storage medium. In the alternative, the storage medium can be integral to your check here processor. The processor along with the storage medium might reside in an ASIC. The ASIC may well reside in a very user terminal. In the choice, the processor and also the storage medium may well reside as discrete parts inside of a computing system/user terminal.
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The reset time frame could possibly be ahead of the clock Examine period of time 310. Utilizing the clock CLK to induce the Consider circuit 240 might utilize a clock edge at an end of the clock Assess time period to bring about the Appraise circuit.